Logic-timing Simulation and the Degradation Delay Model

Logic-timing Simulation and the Degradation Delay Model
Author :
Publisher : Imperial College Press
Total Pages : 288
Release :
ISBN-10 : 9781860945892
ISBN-13 : 1860945899
Rating : 4/5 (899 Downloads)

Book Synopsis Logic-timing Simulation and the Degradation Delay Model by : Manuel J. Bellido

Download or read book Logic-timing Simulation and the Degradation Delay Model written by Manuel J. Bellido and published by Imperial College Press. This book was released on 2006 with total page 288 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides the reader with an extensive background in the field of logic-timing simulation and delay modeling. It includes detailed information on the challenges of logic-timing simulation, applications, advantages and drawbacks. The capabilities of logic-timing are explored using the latest research results that are brought together from previously disseminated materials. An important part of the book is devoted to the description of the ?Degradation Delay Model?, developed by the authors, showing how the inclusion of dynamic effects in the modeling of delays greatly improves the application cases and accuracy of logic-timing simulation. These ideas are supported by simulation results extracted from a wide range of practical applications.Sample Chapter(s)


Logic-timing Simulation and the Degradation Delay Model Related Books

Logic-timing Simulation and the Degradation Delay Model
Language: en
Pages: 288
Authors: Manuel J. Bellido
Categories: Technology & Engineering
Type: BOOK - Published: 2006 - Publisher: Imperial College Press

DOWNLOAD EBOOK

This book provides the reader with an extensive background in the field of logic-timing simulation and delay modeling. It includes detailed information on the c
Delay Modeling in Logic Simulation
Language: en
Pages:
Authors:
Categories:
Type: BOOK - Published: 1980 - Publisher:

DOWNLOAD EBOOK

As digital integrated circuit size and complexity increases, the need for accurate and efficient computer simulation increases. Logic simulators such as SALOGS
Delay Modeling for Functional Timing Analysis
Language: en
Pages: 406
Authors: V. Chandramouli
Categories:
Type: BOOK - Published: 1998 - Publisher:

DOWNLOAD EBOOK

Delay Modeling of Bipolar ECL/EFL (Emitter-Coupled Logic/Emitter-Follower-Logic) Circuits
Language: en
Pages: 79
Authors: Andrew T. Yang
Categories:
Type: BOOK - Published: 1986 - Publisher:

DOWNLOAD EBOOK

This report deals with the development of a delay-time model for timing simulation of large circuits consisting of Bipolar ECL(Emitter-Coupled Logic) and EFL (E
Incremental Zero/ Unit-delay Switch-level Logic Simulation
Language: en
Pages: 34
Authors: Larry G. Jones
Categories: Computer simulation
Type: BOOK - Published: 1990 - Publisher:

DOWNLOAD EBOOK

Abstract: "We present the methods used in the implementation of an incremental zero/unit-delay switch-level logic simulator for MOS circuits based on the MOSSIM