A Tutorial on Fpga-Based System Design Using Verilog Hdl

A Tutorial on Fpga-Based System Design Using Verilog Hdl
Author :
Publisher : Createspace Independent Publishing Platform
Total Pages : 342
Release :
ISBN-10 : 172153038X
ISBN-13 : 9781721530380
Rating : 4/5 (380 Downloads)

Book Synopsis A Tutorial on Fpga-Based System Design Using Verilog Hdl by : Ming-Bo Lin

Download or read book A Tutorial on Fpga-Based System Design Using Verilog Hdl written by Ming-Bo Lin and published by Createspace Independent Publishing Platform. This book was released on 2018-08-09 with total page 342 pages. Available in PDF, EPUB and Kindle. Book excerpt: The contents of this book are designed on the basis of the problem- based-learning (PBL) approach and follow the paradigm: design -> entry (in both schematic and HDL) -> verification as well as implementation. Based on this paradigm, we develop an incremental learn-by-doing method to help the student to build a sound understanding in both the design principles and the implementa-tions of digital systems based on FPGA devices. Features of this book include - Lab projects are exercised with schematic entry first and then Verilog HDL entry. - Both functional and timing verification are performed in each entry method to ensure the resulting design can work properly in FPGA devices. - The incremental learn-by-doing method is applied to gradually introduce new concepts and hardware resources and increase the depth of lab projects. - The paradigm, design -> entry (in both schematic and HDL) -> verification as well as implementation, is employed to familiarize the reader with the right concept and use of the HDL entry method. - Optional lab projects are provided for readers to make realistic tests on FPGA devices. - Extended lab projects to broaden the reader's background knowledge and ca-pability. This book can be used as the textbook for the following courses: Digital Logic Design Practice, Introduction to FPGA-Based System Design, Introduction to Digital System Practice, and Introduction to Verilog HDL.


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