Hardware Annealing in Analog VLSI Neurocomputing

Hardware Annealing in Analog VLSI Neurocomputing
Author :
Publisher : Springer Science & Business Media
Total Pages : 251
Release :
ISBN-10 : 9781461539841
ISBN-13 : 1461539846
Rating : 4/5 (846 Downloads)

Book Synopsis Hardware Annealing in Analog VLSI Neurocomputing by : Bank W. Lee

Download or read book Hardware Annealing in Analog VLSI Neurocomputing written by Bank W. Lee and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 251 pages. Available in PDF, EPUB and Kindle. Book excerpt: Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips.


Hardware Annealing in Analog VLSI Neurocomputing Related Books

Hardware Annealing in Analog VLSI Neurocomputing
Language: en
Pages: 251
Authors: Bank W. Lee
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

DOWNLOAD EBOOK

Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and
Cellular Neural Networks and Analog VLSI
Language: en
Pages: 105
Authors: Leon Chua
Categories: Technology & Engineering
Type: BOOK - Published: 2013-03-09 - Publisher: Springer Science & Business Media

DOWNLOAD EBOOK

Cellular Neural Networks and Analog VLSI brings together in one place important contributions and up-to-date research results in this fast moving area. Cellular
Neural Information Processing and VLSI
Language: en
Pages: 569
Authors: Bing J. Sheu
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

DOWNLOAD EBOOK

Neural Information Processing and VLSI provides a unified treatment of this important subject for use in classrooms, industry, and research laboratories, in ord
World Congress on Neural Networks
Language: en
Pages: 860
Authors: Paul Werbos
Categories: Psychology
Type: BOOK - Published: 2021-09-09 - Publisher: Routledge

DOWNLOAD EBOOK

Centered around 20 major topic areas of both theoretical and practical importance, the World Congress on Neural Networks provides its registrants -- from a dive
Neural Models and Algorithms for Digital Testing
Language: en
Pages: 187
Authors: S.T. Chadradhar
Categories: Computers
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

DOWNLOAD EBOOK

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9 QUADRATIC 0-1 PROGRAMMING 8S 9. 1 Energy Minimization 86 9. 2 Notation and Tenninology .