Computer Architecture Techniques for Power-Efficiency

Computer Architecture Techniques for Power-Efficiency
Author :
Publisher : Springer Nature
Total Pages : 207
Release :
ISBN-10 : 9783031017216
ISBN-13 : 3031017218
Rating : 4/5 (218 Downloads)

Book Synopsis Computer Architecture Techniques for Power-Efficiency by : Stefanos Kaxiras

Download or read book Computer Architecture Techniques for Power-Efficiency written by Stefanos Kaxiras and published by Springer Nature. This book was released on 2022-06-01 with total page 207 pages. Available in PDF, EPUB and Kindle. Book excerpt: In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and a slowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions


Computer Architecture Techniques for Power-Efficiency Related Books

Computer Architecture Techniques for Power-Efficiency
Language: en
Pages: 207
Authors: Stefanos Kaxiras
Categories: Technology & Engineering
Type: BOOK - Published: 2022-06-01 - Publisher: Springer Nature

DOWNLOAD EBOOK

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in t
Computer Architecture Techniques for Power-efficiency
Language: en
Pages: 220
Authors: Stefanos Kaxiras
Categories: Computers
Type: BOOK - Published: 2008 - Publisher: Morgan & Claypool Publishers

DOWNLOAD EBOOK

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in t
Power-Efficient Computer Architectures
Language: en
Pages: 98
Authors: Magnus Själander
Categories: Computers
Type: BOOK - Published: 2014-12-01 - Publisher: Morgan & Claypool Publishers

DOWNLOAD EBOOK

As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power eff
Energy Efficient High Performance Processors
Language: en
Pages: 165
Authors: Jawad Haj-Yahya
Categories: Technology & Engineering
Type: BOOK - Published: 2018-04-04 - Publisher: Springer

DOWNLOAD EBOOK

This book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, i
Power-Efficient Computer Architectures
Language: en
Pages: 88
Authors: Magnus Själander
Categories: Technology & Engineering
Type: BOOK - Published: 2022-05-31 - Publisher: Springer Nature

DOWNLOAD EBOOK

As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power eff